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Frequency Shift Keying (FSK) Demodulator


In computer peripheral and radio (wireless) communication, the binary data or code is transmitted by means of a carrier frequency that is shifted between two preset frequencies. Since a carrier frequency is shifted between two preset frequencies, the data transmission is said to use a frequency shift keying (FSK) technique.

Working Of The System

A very useful application of the 565 PLL is as a FSK demodulator. In this 565 PLL the frequency shift is usually accomplished by driving a VCO with a binary data signal so that the two resulting frequencies corresponding to logic 0 and logic 1 state of the binary data signal. The frequencies corresponding to logic 1 and logic 0 states are commonly called the mark and space frequencies. Several standards are used to set the mark and space frequencies. For example, when transmitting teletypewriter information using a modulator-demodulator (modem for short), a 1070 Hz-1270 Hz (mark-space) pair represents the originated signal; while a 2025 Hz - 2225 Hz (mark-space) pair represents the answer signal.

 

Circuit Description

The FSK generator is formed by using a 555 as an astable multivibrator whose frequency is controlled by the state of transistor Q1. In other words, the output frequency of the FSK generator depends on the logic state of the digital data input. One hundred and fifty hertz is one of the standard frequencies at which the data are commonly transmitted. When the input is logic 1, transistor Q1 is off. Under this conditions, the 555 works in its normal mood as an astable multivibrator; that is, capacitor C1 charges through R3 and R2 to 2/3 VCC and discharge through R2 to 1/3 VCC as long as the input is at 1 state. The frequency of the output wave form is given by the equation

F0 = 1.45/(RA + 2RB)C = 1070 Hz

The Value of R1, R2, R3 are selected so that f0 represents a mark frequency (1070 Hz). On the other hand, when the input is logic 0, Q1 is on (saturated), which in turn connect to a resistance R1 across R3. This action reduces the charging time of the capacitor and increase the output frequency which is given by the equation

F0 = 1.45/(RA||RC + 2RB)C = 1270 Hz

By proper selection of R1, this frequency is adjusted to equal the space frequency of 1270 Hz. The difference between FSK signals 1070 Hz and 1270 Hz; this difference is called frequency shift.

As shown in figure 1-1, the output of the 555 FSK generator is then applied to the 565 FSK demodulator. Capacitive coupling is used to at the input to remove a dc level. As the signal appears at the input of the 565, the loop locks to the input frequency and tracks it between the two frequencies with the corresponding dc shift at the output. Resistor R4 and capacitor C9­ determine the free-running frequency of the VCO, while, C5 is a loop filter capacitor that establishes the dynamic characteristics of the demodulator. Here C5 must be chosen smaller than usual to eliminate overshoot on the output pulse. A three-stage RC ladder (low-pass) filter is used to remove the carrier component from the output. The high cutoff frequency (fH = 1/2 ∏RC) of the ladder filter is chosen to be approximately halfway between the maximum keying rate of 150 Hz and twice the input frequency, that is, approximately 2200 Hz. The output signal of 150 Hz can be made logic compatible by connecting a voltage comparator between the output of the ladder filter and pin 6 of the PLL. The VCO frequencies is adjusted with R4 so that at fIN = 1070 Hz a slightly positive voltage is obtained at the output.

PARTS LISTS

Resistors (all ¼-watt, ± 5% Carbon)

 

R1 = 50 kΩ set at 39.24 kΩ potentiometer

R2 = 47 kΩ

R3 = 50 kΩ potentiometer

R4 = 10 kΩ potentiometer

R5, R­6 = 680 Ω

7, R­8, R­9 = 10 kΩ

R10 = 27 kΩ

R11 = 100 Ω

Capacitors

C1, C2 = 0.01 µF

C3 = 0.1 µF

C4 = 0.001 µF

C5 = 0.15 µF

C6, C7, C8 = 0.02 µF

C9 = 0.05 µF

Semiconductors

IC1 = NE555 Timer IC

IC2 = NE565

IC3 = 741 or 351

Q1 = 2N404

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