Counter Circuit | Digital Counter
Nowadays counting circuits using CMOS lCs such as 4026, 4033, 4518, 4520 and 4511, with common-cathode 7-segment LED displays (FND500, etc) or LCD displays are becoming quite popular. Counting is very important in our work. Some examples are: counting of time (clocks), counting of objects etc. Here an object counting circuit using all CMOS lCs has been presented.
Various types of counting circuits using TTL ICs such as 7490 and 7447 with common anode type of 7-segment LED displays are available and have appeared in different journals. But the circuit given here differs from all these circuits. This circuit is designed using CMOS lCs which are becoming more and more popular due to their own advantages. A few important advantages of CMOS lCs over popular TTL circuits are:
- Very low power consumption.
- Wide supply voltage range
- Good noise immunity
- High package density
- High fan-out capability
|IC1||CD4093 quad 2-input NAND schmitt trigger|
|IC2 , IC3||CD4518 dual BCD up counter|
|IC4 TO IC7||CD4511 BCD to seven-segment latch decoder-driver|
|DIS1 TO DIS4|
FND500 or TIL315 seven-segment
common cathode display
|T1||2N5777 or TEK5154 or SPT100 phototransistor|
|T2||BC109 npn transistor|
|R1||2.2 kilo ohm|
|R2||220 kilo ohm|
|R3 , R4 , R5||1 kilo ohm|
|R5 to R32||560 ohm|
|S1||SPDT micro switch|
|L1||6.3V , 60mA lamp|
9-Volt power supply , IC socket.
PCB , ribbon cable , enclosure etc.
The input circuit consists of phototransistor T1 followed by a high-speed switching transistor amplifier built around T2. A 6.3V, 60mA lamp is used as a light source. A fine beam of light from the lamp is focused on to the base of the phototransistor. The property of the phototransistor is that whenever the light focused on its base is obstructed, it gives a pulse. So the objects to be counted are arranged in a row to move one by one in between the light source and the phototransistor.
The pulse output from the phototransistor is amplified by T2 and the output of T2 is fed to IC1. IC1 is a CMOS quad 2-input NAND schmitt trigger (CD4093) which converts these pulses into perfect square waves. IC1 consists of four such schmitt triggers but only one is used here for our purpose. The output of the schmitt trigger is fed to a counter chain for counting and disphying the counts digitally.
The counter chain consists of two dual BCD up counters (IC2 and IC3). The clock inputs of all the counters are grounded. The cascading of counters can be done by connecting D output of the previous stage to the ‘enable’ input (pin 10) of the next stage of counters, keeping clock input of the latter at ground potential. The output of IC1 is fed to the enable input (pin 2) of the counter (IC2), keeping its ‘clock input low. The D-C-B-A outputs of these counters; are decoded using CMOS BCD to 7-segment latch decoder driver consisting of IC4, IC5, IC6 and IC7.
For normal operation, the LE pin (latch enable pin 5) should be grounded and the pins BI (blanking input pin 4) and LT (lamp test pin 3) should be connected to the positive supply. When LT is low, all the outputs of the decoder (a to g) will go to high state -irrespective of BCD inputs. The unwanted digit can be blanked by taking Bl input of that particular decoder to low state.
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